January 19, 2025 
Global 
Full-time We are looking for a VLSI Backend Design Engineer to transform RTL designs into physical implementations on semiconductor chips. This role involves detailed gate-level design, verification, and optimization for specific technologies.
Key Responsibilities
- Perform gate-level design by translating RTL into gate netlists using logic synthesis tools.
- Conduct gate verification to ensure equivalence between the RTL and the gate netlist.
- Optimize design for timing, power, and area constraints.
- Collaborate with frontend engineers to align logic designs with physical requirements.
Skills and Expertise
- Proficiency in logic synthesis tools and techniques.
- Experience in gate-level verification using formal equivalence checking and simulation.
- Strong knowledge of timing analysis, power optimization, and physical design constraints.